发明名称 TEST POTENTIAL TRANSFER CIRCUIT AND SEMICONDUCTOR MEMORY EMPLOYING THE CIRCUIT
摘要 A potential transfer circuit consists of a first pad, a second pad, a voltage detection circuit, a level shift circuit and a switching MOS transistor. The voltage detection circuit is connected to the first pad and detects a high voltage applied to the first pad and generates a control signal which is supplied to the level shift circuit. The level shift circuit receives the control signal and generates a drive signal which is in turn supplied to the gate of the MOS transistor, causing the MOS transistor to supply to a circuit under test a test signal supplied through the second pad to the drain of the MOS transistor. In preferred embodiments, the power supply of the level shift circuit is derived from the high voltage signal supplied to the first pad.
申请公布号 KR100207971(B1) 申请公布日期 1999.07.15
申请号 KR19950003656 申请日期 1995.02.24
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 YOSHIHISA, SUGIURA;YOSHIHISA, IWATA;KENICHI, IMAMIYA
分类号 G01R31/28;G11C11/40;G11C11/401;G11C11/407;G11C29/00;G11C29/06;G11C29/12;G11C29/14;G11C29/46;H01L21/66;H01L21/822;H01L27/04;H01L27/10;(IPC1-7):G11C11/40 主分类号 G01R31/28
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