发明名称 |
Schaltung zur Erzeugung künstlicher Zufallszahlenmuster |
摘要 |
An artificial random-number pattern generating circuit has a plurality of flip-flops (11-14; 11-15) each having a set signal input terminal and a clock signal input terminal; a plurality of selectors (21-23,25,27; 21-24,26,28) each of which forwards its output to the corresponding flip-flop and receives a first operation mode signal (C1) and/or a second operation mode signal (C2); and an exclusive logical OR gate (30). The artificial random-number pattern generating circuit functions in three different ways, that is, as an artificial random-number pattern generator, a boundary scanning buffer or an input buffer, in accordance with the combinations of the first and second operation mode signals. The circuit can make not only a diagnosis of failure in the internal circuit of the LSI but also overall tests including those for input and output buffer circuits of the mounted LSI chip on a board or those for external wirings for the LSI. <IMAGE> |
申请公布号 |
DE69229362(D1) |
申请公布日期 |
1999.07.15 |
申请号 |
DE1992629362 |
申请日期 |
1992.01.10 |
申请人 |
NEC CORP., TOKIO/TOKYO, JP |
发明人 |
OHKUBO, CHIE, C/O NEC CORPORATION, MINATO-KU, TOKYO 108-01, JP;HAGIHARA, YASUHIKO, C/O NEC CORPORATION, MINATO-KU, TOKYO 108-01, JP |
分类号 |
G01R31/317;G01R31/3181;G01R31/3183;G06F7/58;G06F11/27;(IPC1-7):G06F7/58;G06F11/26;H03K3/84 |
主分类号 |
G01R31/317 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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