| 摘要 |
A switched capacitor circuit (60) reduces sampling noise by oversampling an input signal in space domain. The switched capacitor circuit (60) includes four sampling capacitors (72, 74, 76, 78) serially coupled together via five integrating switches (71, 73, 75, 77, 79). Each clock cycle of the oversampling process has a sampling phase and an integrating phase. In the sampling phase, the integrating switches (71, 73, 75, 77, 79) are nonconductive and the sampling capacitors (72, 74, 76, 78) sample the input signal through eight sampling switches (81, 82, 83, 84, 85, 86, 87, 88). In the integrating phase, the charge stored in the sampling capacitors (72, 74, 76, 78) is transferred to an integrator (90). |
