| 摘要 |
A controller for controlling the operation of a variable length decoder, which includes a coding protocol determination circuit for determining a coding protocol used in coding a digital data stream currently being decoded by the variable length decoder, and a configuration control circuit for automatically reconfiguring the variable length decoder into a selected one of a plurality of different possible decoding configurations, depending upon the determined coding protocol. Also disclosed is a controller for controlling the operation of a variable length decoder, which includes a code type determination circuit which determines a code type of a current code word currently being decoded by the variable length decoder, and a mode switching circuit which switches a mode of operation of the controller between a parallel decoding mode of operation and a tree-searching mode of operation, depending upon the determined code type of the current code word. Also disclosed is a code word value memory which can be used by a variable length decoder for decoding the values of the code words in the input digital data stream. The code word value memory is logically organized into a plurality of individually addressable pages, at least one of which is addressed by a first code prefix and includes individual code word values addressed by the first code prefix plus a sub-tree associated whit at least one other code prefix, to thereby maximize memory utilization and minimize the required memory size. |
