发明名称 |
Method and apparatus of column redundancy for non-volatile analog and multilevel memory integrated circuits |
摘要 |
<p>This invention provides column redundancy circuits in a storage array, which circuits are used in a non-volatile memory chip to increase the production yield due to manufacturing defects. The invention includes a scheme to latch and transfer the redundancy information, a redundancy logic circuit, a redundancy column driver, an array architecture with column redundancy, a scheme to program and read the column redundancy memory cells, a scheme to multiplex the fuses, and circuits to use an out-of-bound address as a column redundancy enable/disable signal. <IMAGE></p> |
申请公布号 |
EP0929036(A2) |
申请公布日期 |
1999.07.14 |
申请号 |
EP19990300052 |
申请日期 |
1999.01.05 |
申请人 |
INFORMATION STORAGE DEVICES, INC. |
发明人 |
TRAN, HIEU VAN;BRENNAN, JAMES, JR. |
分类号 |
G11C16/06;G11C11/56;G11C16/02;G11C27/00;G11C29/00;G11C29/04;(IPC1-7):G06F11/20 |
主分类号 |
G11C16/06 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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