发明名称 |
Method and system for speculatively sourcing cache memory data prior to upstream cache invalidation within a multiprocessor data-processing system |
摘要 |
A method and system for speculatively sourcing data among cache memories within a multiprocessor data-processing system is disclosed. In accordance with the method and system of the present invention, the data-processing system has multiple processing units, each of the processing units including at least one cache memory. In response to a request for data by a first processing unit within the data-processing system, an intervention response is issued from a second processing unit within the data-processing system that contains the requested data. The requested data is then sourced from a secondary cache memory within the second processing unit onto a system data bus concurrently with invalidating a copy of the requested data from a primary cache within the second processing unit. During this time, the second processing unit is also pending for a combined response to return from all the processing units.
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申请公布号 |
US5924118(A) |
申请公布日期 |
1999.07.13 |
申请号 |
US19970839542 |
申请日期 |
1997.04.14 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
ARIMILLI, RAVI KUMAR;DODSON, JOHN STEVEN;LEWIS, JERRY DON |
分类号 |
G06F12/08;(IPC1-7):G06F13/00 |
主分类号 |
G06F12/08 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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