| 摘要 |
In a disk rotational velocity controlling circuit, an edge detection circuit 1 comprises a rising edge detector and a falling edge detector for detecting a rising edge and a falling edge of an EFM signal E, independently of each other. A synchronous pattern detection circuit 13 includes a first pattern width detector 2 for measuring an interval between each pair of continuous rising edge detection signals REG to compare each measured rising edge interval with a normal synchronous pattern width so as to generate first and second rotational signals RFF and RRW, a second pattern width detector 3 for measuring an interval between each pair of continuous falling edge detection signals FEG to compare each measured falling edge interval with the normal synchronous pattern width so as to generate third and fourth rotational signals FFF and FRW, and a detection result synthesis circuit 4 for synthesizing the first and third rotation signals RFF and FFF to generate a positive rotation signal FF and for synthesizing the second and fourth rotation signals RRW and FRW to generate a negative rotation signal RW.
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