摘要 |
A frequency modulation circuit includes a VCO which constitutes a PLL along with a loop filter which is operated by a current source. Such a frequency modulation circuit is formed in monolithic IC. When a power source of the IC is turned-on, a capacitor included in the loop filter is biased by an output voltage of a voltage follower which receives Vcc/2. Since output voltage rises in the same manner as Vcc, a center frequency of the VCO can be rapidly pulled-in a phase-locked state of the PLL. In addition, the frequency modulation circuit is provided with a V-1 conversion circuit which increases a charging current for the capacitor in response to a mute signal generated when the power source is turned-on, whereby a time constant of the loop filter is made small substantially.
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