| 摘要 |
PROBLEM TO BE SOLVED: To prevent data read from malfunctioning by normally sensing data in memory cells and outputting them according to output timing of a sense amplifier enable signal, a sense amplifier equalizing signal, and a double latch enable signal. SOLUTION: While a sense amplifier enable signal DSAE is at a high level and a double data latch enable signal DLE is at a low level, the sensed data are outputted to common data lines SOUT, SOUTB and latched by latching parts 22, 23. Following this, transmission gates 20, 21 are intercepted by the double latch enable signals DLE, DLEβ, and a current mode double latch sense amplifier 101 is separated from the common data lines SOUT, SOUTB, therefore, the sensed data are not outputted to the common data lines SOUT, SOUTB but the current mode double latch sense amplifier 101 is equalized by a sense amplifier equalizing signal DSAEQ.
|
