发明名称 Method of fabricating a ferrolelectric capacitor with a graded barrier layer structure
摘要 A method of fabricating an integrated circuit capacitor in which a first conductive plate, a layer of ferroelectric material, and a second conductive plate are deposited and formed in sequence. Thereafter a diffusion barrier material and an insulative material are deposited either (1) as layers of the diffusion barrier material and the insulative material with tensile and compressive stresses in the respective layers offsetting one another, (2) as a layered dielectric stack with alternating layers of the diffusion barrier material and the insulative material, or (3) as a graded diffusion barrier material varying from a binary oxide of Ta, Nb, or Zr at the surface of the ferroelectric material to SiO2 at a distance above the surface of the ferroelectric material.
申请公布号 US5923970(A) 申请公布日期 1999.07.13
申请号 US19970974779 申请日期 1997.11.20
申请人 ADVANCED TECHNOLOGY MATERIALS, INC. 发明人 KIRLIN, PETER S.
分类号 H01L21/02;H01L21/316;(IPC1-7):H01G4/06 主分类号 H01L21/02
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