Amplitude detecting device

摘要

The phase controlling circuit 1 controls the phase of the input sinusoidal signal S1 to generate first and second sinusoidal signal S1 and S2 which have different phases of 90 DEG shifted from each other. The signal generating circuits 2a and 2b square the first and second sinusoidal signal S1 and S2 to generate first and second squared sinusoidal signals S12 and S22, respectively. The squared sinusoidal signals S12 and S22 are added by the signal adding circuit 3, thereby generating the added output S3 which is an amplitude of the input sinusoidal signal S. The phase controlling circuit 1 comprises 90 DEG phase shift circuits 11 and 12 which have a common signal input terminal and the respective signal output terminals. The 90 DEG phase shift circuit is composed of an all-pass filter whose central frequency is set to be f0- DELTA f so as to generate the first sinusoidal signal. The second 90 DEG phase shift circuit is composed of an all-pass filter whose central frequency is set to be f0+ DELTA f so as to generate the second sinusoidal signal.