发明名称 Data processing circuit
摘要 A data processing circuit multiplies, by 2a, input data supplied in a time-division multiplexed manner over a plurality of lines. The data processing circuit includes first, second, and third data selectors each having first, second, and third input terminals and a single output terminal. The first input terminal of the first selector is supplied with an input signal of "0". A first input line is connected in common to the second input terminal of the first data selector and the first input terminal of the second data selector. A second input line is connected in common to the third input terminal of the first data selector and the second input terminal of the second data selector. A third input line is connected in common to the third input terminal of the second data selector and the second input terminal of the third data selector. The first, second, and third input lines are supplied input data in a time-division multiplexed manner Each of the first, second, and third data selectors selects one of the input data supplied to the first, second, and third input terminals and outputs the selected data through the output terminal.
申请公布号 US5923578(A) 申请公布日期 1999.07.13
申请号 US19970780893 申请日期 1997.01.09
申请人 SONY CORPORATION 发明人 OHKI, MITSUHARU
分类号 G06F7/38;G06F7/52;G06F7/523;G06F7/525;G06F7/533;H03H17/06;(IPC1-7):G06F7/44;G06F15/00 主分类号 G06F7/38
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