| 摘要 |
PROBLEM TO BE SOLVED: To read data from a memory in a desired order on an address generation circuit. SOLUTION: Switch means (SE0-SE6) inputting carry information (C) outputted from desired full adders (FA0-FA6) in accordance with prescribed control information (CONT0 -CONT13 ) are provided. Thus, the address of the desired order can easily be generated only by operating the transmission order and data can be read from the memory in the desired order. |
