| 摘要 |
<p>PROBLEM TO BE SOLVED: To prevent an illegal memory access caused by an erroneous operation of a circuit which has been turned into operation-disabled state by a selective operation-disable function of a data processor. SOLUTION: This device is provided with a central processing unit(CPU) 2, first circuits 3 and 4 connected to the CPU and a stop control circuit 12 for selectively stopping the operation of the first circuits, and the CPU inputs stop control signals SFPU and SMLT outputted from the stop control circuit, and processes an instruction to use the first circuits as an illegal instruction or invalid instruction on the conditions that the stop control signal instructs stop at the time of decoding the instruction to use the first circuits. By making the instruction illegal or invalid like this, the occurrence of illegal memory access can be prevented.</p> |
