发明名称 COMPUTER SYSTEM AND TIMER INTERRUPTION CONTROL METHOD
摘要 <p>PROBLEM TO BE SOLVED: To provide a computer system with which a CPU power saving function or a CPU clock switching function is more efficiently operated by controlling a timer interruption interval. SOLUTION: When the idle state of a system is detected, a monitor system 101 to be periodically called for monitoring the operating conditions of the system acquires an availability rate of a CPU 11 and reloads a register 131 of a system controller 13. Thus, a timer interruption interval is set corresponding to the acquired availability rate of the CPU 11, and the supply of a clock to the CPU 11 is stopped by estimating that the supply of the clock to the CPU 11 in a stop state is restarted with a timer interruption. Namely, the timer interruption is appropriately controlled so that the longer the idle state lasts, for example, the larger the interval to generate the timer interruption is set.</p>
申请公布号 JPH11184550(A) 申请公布日期 1999.07.09
申请号 JP19970355437 申请日期 1997.12.24
申请人 TOSHIBA CORP 发明人 NAKAZATO TATSU
分类号 G06F1/32;G06F1/04;G06F9/46;G06F9/48;(IPC1-7):G06F1/04 主分类号 G06F1/32
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