发明名称 INTEGRATED BUS CONTROLLER AND TERMINATING CHIP
摘要 An integrated circuit chip (700) controls a bus (120) and terminates at least one differential data line (122) of the bus wherein the at least one differential data (122) line includes a first bus line (124) of the bus and a second bus line (126) of the bus (120). The integrated circuit chip includes a package (710) and a substrate (720). The package includes terminals (712) that are configured to couple the package (710) to the bus (720). A first terminal is configured to couple the package to the first bus line, and a second terminal is configured to couple the package to the second bus line. The substrate is supported by the package. Furthermore, the substrate includes a bus controller circuit (190) coupled to the terminals and a terminating circuit (115) coupled to the first terminal and the second terminal. The bus controller circuit (190) is configured to control transfer of data on the bus (120), and the terminating circuit (115) is configured to substantially match a characteristic impedance of the at least one differential data line (122).
申请公布号 WO9934413(A2) 申请公布日期 1999.07.08
申请号 WO1998US26827 申请日期 1998.12.16
申请人 LSI LOGIC CORPORATION 发明人 GASPARIK, FRANK;LOHMEYER, JOHN, B.
分类号 G06F13/40;H01L 主分类号 G06F13/40
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