Verfahren und Vorrichtung zur Kurzschluß- und Überlastausschaltung mit aktiven Limitern

摘要

By using JFET's as semiconductor components and setting the JFET-current (IJFET) and the gate source voltage (UGS), it is possible to obtain a corresponding voltage drop (UJFET) at the semiconductor component point. According to the invention, SiC-based JFET's (1) are used and the gate source voltage (UGS) is regulated according to the JFET-current (IJFET) in such a way that the voltage (UJFET) after the charge carriers have been eliminated is as high as possible whilst remaining uncritical for the JFET (1) and the circuit. The inventive device for carrying out the method has a processor (10) for determining and processing the measuring values obtained at the same time as identifying short circuits early and clearing them.