发明名称 |
IMPROVED INSTRUCTION DISPATCH MECHANISM FOR A GUARDED VLIW ARCHITECTURE |
摘要 |
A very long instruction word (VLIW) architecture describes a processor comprising multiple functional units operating in parallel. A very long instruction word contains a plurality of fields or issue slots for specifying which operations are to be performed by the functional units. Execution of an operation can be inhibited by a guard value specified in the issue slot. Instructions are dispatched in such a guarded VLIW architecture by routing one of a plurality of fields issued for a common functional unit based on the guard value. Thus, an instruction word may contain a greater number of issue slots than there are functional units.
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申请公布号 |
WO9934282(A1) |
申请公布日期 |
1999.07.08 |
申请号 |
WO1998IB01521 |
申请日期 |
1998.10.01 |
申请人 |
KONINKLIJKE PHILIPS ELECTRONICS N.V.;PHILIPS AB |
发明人 |
MEHRA, VIJAY, KRISHNA |
分类号 |
G06F9/30;G06F9/38;(IPC1-7):G06F9/38;G06F15/16 |
主分类号 |
G06F9/30 |
代理机构 |
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代理人 |
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