Production of DRAM capacitor having increased surface area

摘要

A capacitor is produced using a single photolithography process to form a lower polysilicon electrode on a semiconductor substrate bearing a MOS structure. A capacitor is produced on a semiconductor substrate bearing a MOS structure by: (a) sequentially forming a first oxide layer (101), a silicon nitride layer (102), a second oxide layer and a first polysilicon layer on the substrate (100); (b) patterning the first polysilicon layer and the second oxide layer to form a first opening which exposes the silicon nitride layer (102); (c) forming and etching a third oxide layer using the silicon nitride layer as etch-stop; (d) etching the silicon nitride layer (102) to form a second opening which exposes the first oxide layer (101) using the residual third oxide layer and the first polysilicon layer as mask; (e) deepening the second opening by etching the first oxide layer (101) until the substrate is exposed; (f) forming a second polysilicon layer (107) to cover the first polysilicon layer and the first opening and to fill the second opening; (g) forming a fourth oxide layer on the second polysilicon layer (107); (h) removing the fourth oxide layer, the second polysilicon layer (107) and the first polysilicon layer until the second oxide layer is exposed; (i) wet etching the remaining fourth oxide layer and the second oxide layer using the silicon nitride layer (102) as etch-stop; and (j) forming a dielectric layer (109) and an overlying third polysilicon layer (110). An Independent claim is also included for a similar capacitor production process in which the silicon nitride layer is also patterned in step (b) so that the first opening exposes the first oxide layer.