发明名称 |
Semiconductor memory with sensing stability |
摘要 |
A memory having a read function for generating a plurality of data bits on a single output pin includes a control circuit, a sense amplifier circuit, and a decoder. The control circuit generates a decoder control pulse responding to the control pulse generated from an address transition detector receiving a first address. The sense amplifier circuit senses data bits from a memory array of the memory and is coupled to the output pin through a data output buffer. The decoder receives a second address and provides decoding signals to the sense amplifier circuitry in response to the control pulse generated from the control circuit. The read-out operation according to the invention is performed sufficiently and stably even when a propagation skew occurs between the first address and the second address.
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申请公布号 |
US5920519(A) |
申请公布日期 |
1999.07.06 |
申请号 |
US19970855256 |
申请日期 |
1997.05.13 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
JANG, CHEOL-UNG |
分类号 |
G11C16/02;G11C7/10;G11C16/06;(IPC1-7):G11C8/00 |
主分类号 |
G11C16/02 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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