发明名称 |
Method and apparatus for switching between source-synchronous and common clock data transfer modes in a multiple processing system |
摘要 |
A method and apparatus for transferring data between bus agents in a computer system including a bus operating at a bus clock rate. The method includes the step of receiving a transaction request from a requesting agent including an indication of a plurality of data widths the requesting agent processes. In response to the transaction request, a data transmission is configured in accordance with a data width that both the requesting agent and a responding agent process. The data transmission is performed asynchronously with respect to the bus clock if the data width is one of a first plurality of data widths, otherwise, the data transmission is performed synchronously with respect to the bus clock.
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申请公布号 |
US5919254(A) |
申请公布日期 |
1999.07.06 |
申请号 |
US19970881941 |
申请日期 |
1997.06.25 |
申请人 |
INTEL CORPORATION |
发明人 |
PAWLOWSKI, STEPHEN S.;MACWILLIAMS, PETER D.;WU, WILLIAM S.;SCHULTZ, LEN J. |
分类号 |
G06F13/38;G06F13/40;(IPC1-7):G06F1/12;G06F13/42 |
主分类号 |
G06F13/38 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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