| 摘要 |
A digital-to-analog converting section includes a delta-sigma ( DELTA SIGMA ) modulator and converts an input digital signal to an analog signal on the basis of delta-sigma modulation of the input digital signal by the delta-sigma modulator. A digital adder is provided, at the input stage of the digital-to-analog converting section, to add an oscillation-preventing direct current value to the input digital signal, and the adder operates to prevent oscillation in the delta-sigma modulating loop when the input digital signal changes from an "input signal present" state to a "no input signal" state. Also, an output buffer is provided, at the output stage of the digital-to-analog converting section, to shift the converted analog signal in response to an offset-adjusting current. Thus, the offset adjustment can be effected without adversely influencing the oscillation-preventing action of D.C. dithers.
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