发明名称 Clock timing recovery methods and circuits
摘要 A clock timing recovery circuit for recovering the clock timing from a baseband signal obtained by detection of a received signal. The clock timing is rapidly established using a clock signal which has been phase-shifted from the desired clock timing to sample the baseband signal, and by obtaining the optimum phase from the sampled signal obtained as a result. A clock-timing recovery circuit according to this invention does not require oversampling and provides easy optimization of circuit constants.
申请公布号 US5920220(A) 申请公布日期 1999.07.06
申请号 US19970897452 申请日期 1997.07.22
申请人 NIPPON TELEGRAPH AND TELEPHONE CORPORATION 发明人 TAKAO, TOSHIAKI;SUZUKI, YOSHIFUMI;SHIRATO, TADASHI
分类号 H04L7/00;H04L7/02;H04L7/033;H04L7/04;(IPC1-7):H03H3/00 主分类号 H04L7/00
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