发明名称 |
Method and apparatus for providing access protection in an integrated circuit |
摘要 |
A method and apparatus for providing access protection in an integrated circuit (10). In one embodiment access protection circuitry (11) includes access attribute bits (51) which are compared to the access attributes (68) of a memory (14) request. If a mismatch occurs, an access fault signal (52) is asserted. If access fault signal (52) is asserted and a selective reset bit (48) has selected a first memory protection mode, then signal generation circuitry (44) asserts a reset signal (58). Reset signal (58) may be used to initiate a hardware reset of data processor (10). If access fault signal (52) is asserted and a selective reset bit (48) has selected a second memory protection mode, then signal generation circuitry (44) asserts an exception occurred signal (60).
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申请公布号 |
US5920690(A) |
申请公布日期 |
1999.07.06 |
申请号 |
US19970907980 |
申请日期 |
1997.08.11 |
申请人 |
MOTOROLA, INC. |
发明人 |
MOYER, WILLIAM C.;MOUGHANNI, CLAUDE;ASLAM, TAIMUR |
分类号 |
G06F1/00;G06F12/14;G06F21/00;G06F21/24;(IPC1-7):G06F13/00 |
主分类号 |
G06F1/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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