发明名称 HIGH-SPEED SEMICONDUCTOR MEMORY DEVICE WITH DIRECT ACCESS MODE TEST CONTROL CIRCUIT AND ITS TEST METHOD
摘要 <p>PROBLEM TO BE SOLVED: To provide a high-speed semiconductor memory device that can read data from a memory core using a column address strobe signal without using another clock signal on a direct access mode test. SOLUTION: A semiconductor memory device has a memory core 401 containing a memory cell array and a peripheral circuit, and a control part 403 for reading data RWD (7:0) from the memory core by continuously driving a column address strobe signal TestCASB being applied from outside, thus eliminating the need for another clock pin for applying a clock signal, and hence increasing the number of semiconductor memory devices to be tested simultaneously.</p>
申请公布号 JPH11176200(A) 申请公布日期 1999.07.02
申请号 JP19980247545 申请日期 1998.09.01
申请人 SAMSUNG ELECTRON CO LTD 发明人 IN SHUNHEI;KYUNG KYE-HYUN
分类号 G01R31/28;G01R31/26;G11C11/401;G11C29/00;G11C29/14;G11C29/48;(IPC1-7):G11C29/00 主分类号 G01R31/28
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