| 摘要 |
<p>PROBLEM TO BE SOLVED: To discriminate a command mode read and a memory mode read of a flash memory system by allowing a read command to mean reception following a command read indication in a memory cycle or a memory read of bits and transfer to a processor without the command read indication. SOLUTION: When a writable signal is asserted (S60), a command mode is entered (S64). When a command is equal to a command end mode command (S66), the command mode ends (S72). When the command is not equal (S66), on the other hand, a command received from a processor is processed (S74). When the writable signal is not asserted (S60) and the command read indication is not received in a memory cycle (S62), a read is indicated and transfer to the processor is performed (S68). When the indication is received (S62), the contents of a register are transferred to the processor (S70).</p> |
