| 摘要 |
<p>PROBLEM TO BE SOLVED: To realize a signal processing circuit in which a chip area can be reduced, and a design time for circuit layout can be shortened by reducing the number of wirings. SOLUTION: A signal processing circuit having two operation modes is provided with selectrodes SEL1, SEL2,..., SEL N/2, in which data DDB1, DDB2,..., DDB N/2 are shared by functioning circuits 1 and 2, functioning circuits 3 and 4, and functioning circuits N-1 and N operating only in different operation modes, for selecting one set from among two sets of data inputted from a programmable register 100 according to the level of a switching control signal SMC set according to an operation mode. The selected data are outputted to each data bus. Thus, prescribed data can be supplied to the functioning circuit in an operating state in each operation mode, the number of wiring of the data bus can be reduced, a chip area can be reduced, and a layout design time can be shortened.</p> |
