| 摘要 |
PROBLEM TO BE SOLVED: To suppress increase in parasitic resistance due to wiring even when resistance increases at a thin line of a metal silicon layer due to a thermal process, etc., during a process for a semiconductor device. SOLUTION: Related to a semiconductor device 1, a line-like gate electrode 7 is formed on a semiconductor substrate 3, while a diffusion layer 10 of the source/drain is formed on the surface layer of the semiconductor substrate 3 on both sides of the gate electrode 7. A metal silicide layer 8 is formed over the entire area of the surface layer of the diffusion layer 10 while insulated from the gate electrode 7, and an insulating film 12 is so formed as to cover, at least, the gate electrode 7 and the metal silicide layer 8 on the semiconductor substrate 3. A groove 13 is so formed on the insulating film 12 on the metal silicide 8 as to reach the metal silicide layer 8, in the lengthwise direction of the gate electrode 7, while a buried conductive layer 14 is provided in the groove 13. |
