发明名称 Method of making connections to a semiconductor chip assembly
摘要 PCT No. PCT/US93/06930 Sec. 371 Date May 8, 1995 Sec. 102(e) Date May 8, 1995 PCT Filed Jul. 23, 1993 PCT Pub. No. WO94/03036 PCT Pub. Date Feb. 3, 1994A connection component for electrically connecting a semiconductor chip to support substrate incorporates a preferably dielectric supporting structure (70) defining gaps (40). Leads extend across these gaps so that the leads are supported both sides of the gap (66, 70). The leads therefore can be positioned approximately in registration to contacts on the chip by aligning the connection component with the chip. Each lead is arranged so that one end can be displaced relative to the supporting structure when a downward force is applied to the lead. This allows the leads to be connected to the contacts on the chip by engaging each lead with a tool and forcing the lead downwardly against the contact. Preferably, each lead incorporates a frangible section (72) adjacent one side of the gap and the frangible section is broken when the lead is engaged with the contact. Final alignment of the leads with the contacts on the chip is provided by the bonding tool which has features adapted to control the position of the lead.
申请公布号 US5915752(A) 申请公布日期 1999.06.29
申请号 US19950374559 申请日期 1995.05.08
申请人 TESSERA, INC. 发明人 DISTEFANO, THOMAS H.;GRUBE, GARY W.;KHANDROS, IGOR Y.;MATHIEU, GAETAN;SWEIS, JASON;UNION, LAURIE;GIBSON, DAVID
分类号 H01L21/60;H01L23/31;H01L23/495;H01L23/498;H01L23/50;H05K1/18;H05K3/36;H05K3/40;(IPC1-7):H01R43/00 主分类号 H01L21/60
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