Method of forming vertical trench-gate semiconductor devices having self-aligned source and body regions

摘要

Methods of forming vertical trench-gate semiconductor devices include the steps of patterning an oxidation resistant layer having an opening therein, on a face of a semiconductor substrate, and then forming a trench in the semiconductor substrate, opposite the opening in the oxidation resistant layer. An insulated gate electrode is then formed in the trench. The face of the semiconductor substrate is then oxidized to define self-aligned electrically insulating regions in the opening and at a periphery of the patterned oxidation resistant layer. Here, the patterned oxidation resistant layer is used as an oxidation mask so that portions of the substrate underlying the oxidation resistant layer are not substantially oxidized. Source and body region dopants of first and second conductivity type, respectively, are then implanted into the substrate to define preliminary source and body regions which extend adjacent a sidewall of the trench. During the implanting step, the electrically insulating regions are used as a self-aligned implant mask. The implanted dopants are then diffused into the substrate to define source and body regions adjacent upper and intermediate portions of the sidewall of the trench, respectively.