| 摘要 |
An integrated circuit tester includes a pattern generator, a main and an auxiliary period generator, and set of tester channels, one for each terminal of an integrated circuit device under test (DUT). A test is organized into a succession of main test cycles, each divided into two or more auxiliary test cycles. The main period generator indicates the start of each main test cycle and the auxiliary period generator indicates the start of each auxiliary test cycle. Each tester channel is programmed to respond either to the main period generator or to the auxiliary period generator. At the start of each main test cycle, the pattern generator supplies data to each tester channel indicating a test activity to be carried out at the DUT terminal and indicated a time relative to a start of a test cycle at which the activity is to be carried out. Each tester channel programmed to respond to the main period generator carries out the indicated test activity once at the indicated time during the main test cycle. Each tester channel programmed to respond to the auxiliary period generator repeats the indicated test activity at the indicated time during each successive auxiliary test cycle spanned by the main test cycle.
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