发明名称 |
System architecture for and method of dual path data processing and management of packets and/or cells and the like |
摘要 |
A novel networking architecture and technique for reducing system latency caused, at least in part, by access contention for usage of common bus and memory facilities, wherein a separate data processing and queue management forwarding engine and queue manager are provided for each I/O module to process packet/cell control information and delivers queuing along a separate path that eliminates contention with other resources and is separate from the transfer of packet/cell data into and from the memory.
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申请公布号 |
US5918074(A) |
申请公布日期 |
1999.06.29 |
申请号 |
US19970900757 |
申请日期 |
1997.07.25 |
申请人 |
NEONET LLC |
发明人 |
WRIGHT, TIM;MARCONI, PETER;CONLIN, RICHARD;OPALKA, ZBIGNIEW |
分类号 |
G06F13/12;H04L12/56;(IPC1-7):G06F13/00 |
主分类号 |
G06F13/12 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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