Device for executing a program of instructions

摘要

The device comprises 2n memories (Mi) or memory areas in parallel, among which the A instructions are distributed, a unit (UT) for processing these instructions and a management unit (DI, AC) sensitive to a jump instruction extracted from one of the memories in order to disrupt the ordered activation of memories and in its place to activate the memory containing the address given in the jump instruction, and to cause the instruction placed at this address to be delivered to the processing unit (UT). The n least significant bits (LSB) of said M-bit address identify the memory (Mi) or the memory area containing this address, while the (M-n) most significant bits (MSB) identify one of 2M-n rows of 2n addresses each taken from one of the 2n memories. The management unit a control automaton (AC) sensitive to the n (LSB) bits of the address in order to activate the memory containing said address and to cause the instruction which is located there, in the row identified by the (M-n) (MSB) bits, to be delivered to the processing unit.