A frequency divider circuit is provided having an even number of amplifier stages connected in series with the output of the last amplifier stage connected to the input of the first amplifier stage; and modulating means responsive to an input signal to be frequency divided, for modulating the propagation delay through each of the amplifier stages about the period of the input signal to be divided, such that when propagation through the odd amplifier stages increases, the propagation through the even amplifier stages decreases. The frequency divider circuit can be used as a pre-scaler of a radio receiver circuit.
申请公布号
WO9918668(A3)
申请公布日期
1999.06.24
申请号
WO1998GB02963
申请日期
1998.10.02
申请人
CAMBRIDGE SILICON RADIO LIMITED;COLLIER, JAMES, DIGBY, YARLET;SABBERTON, IAN, MICHAEL
发明人
COLLIER, JAMES, DIGBY, YARLET;SABBERTON, IAN, MICHAEL