发明名称 AN ATM CELL PROCESSOR
摘要 An ATM cell processor (10) has a backplane interface (11), a line interface(15), and various processing functions between the interfaces. Cells directed to the line interface (15) are controlled by a queueing function (12) which uses external cell memory via a controller (13) and external control memory via a controller (14). Cells from the backplane are identified and routed by a mapping function (16).
申请公布号 CA2315052(A1) 申请公布日期 1999.06.24
申请号 CA19982315052 申请日期 1998.12.15
申请人 TELLABS RESEARCH LIMITED 发明人 DEWAR, KEVIN;O'DOWD, BRENDAN;BREBNER, GAVIN
分类号 H04L12/56;H04Q11/04;(IPC1-7):H04Q11/04 主分类号 H04L12/56
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