发明名称 COMPUTER SYSTEM PROVIDED WITH MEMORY CONTROL FUNCTION CAPABLE OF DEALING WITH DRAM DIFFERENT IN OPERATION SPEED
摘要 <p>PROBLEM TO BE SOLVED: To optimize the read/write operation of an asynchronous dynamic random access memory(SDRAM) which operates at different frequency. SOLUTION: A computer system when initialized decides and stores BIOS data including cock frequencies of all existent memories. A memory clock generator 500 generates a memory clock 1, 2, or 3 matching the clock frequency of a memory to be used from a system clock according to the BIOS data of the memory. A memory control part 206 and a processor control part 202 perform data transfer with the memories, processor, and peripheral devices through a bus by using the generated memory clock.</p>
申请公布号 JPH11167514(A) 申请公布日期 1999.06.22
申请号 JP19980229070 申请日期 1998.08.13
申请人 COMPAQ COMPUTER CORP 发明人 OLARIG SOMPONG P;PETTEY CHRISTOPHER J
分类号 G06F12/00;G06F1/06;G06F13/16;(IPC1-7):G06F12/00 主分类号 G06F12/00
代理机构 代理人
主权项
地址