| 发明名称 |
DRAM applications using vertical MISFET devices |
| 摘要 |
The present invention relates to RAM circuits comprising memory cells and logic circuitry wherein each of the memory cells comprise at least one Vertical MISFET device comprising a stack of several layers a source layer, a channel layer, a drain layer and a capacitor on the top of the stack of several layers of the Vertical MISFET device.
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| 申请公布号 |
US5914504(A) |
申请公布日期 |
1999.06.22 |
| 申请号 |
US19960664874 |
申请日期 |
1996.06.17 |
| 申请人 |
IMEC VZW |
发明人 |
AUGUSTO, CARLOS JORGE RAMIRO PROENCA |
| 分类号 |
H01L21/8238;H01L27/092;H01L29/165;H01L29/45;H01L29/78;H01L29/786;(IPC1-7):H01L31/032;H01L31/033;H01L31/072;H01L31/10 |
主分类号 |
H01L21/8238 |
| 代理机构 |
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