| 摘要 |
A method of detecting defects within an integrated circuit. Iddq testing for defects within integrated circuits includes measuring the quiescent (Iddq) current conducted by power supply nodes of the integrated circuit which are connected to a power supply while controlling signal levels of a plurality of inputs to the integrated circuit. The method of this invention includes calculating an upper threshold Iddq value and a lower threshold Iddq value. The input nodes are driven to a predetermined combination of input voltages and a corresponding Iddq value is measured. It is determined whether the measured Iddq value is between the upper threshold Iddq value and the lower threshold Iddq value. Another embodiment of this invention includes the upper and lower threshold values being dependent on a measured mean value of Iddq for the integrated circuit.
|
