FREQUENCY MULTIPLICATION CIRCUIT

摘要

PROBLEM TO BE SOLVED: To provide a frequency multiplication circuit operated by the external reference clock signal of the frequency of a wide range for which sensitivity to noise is suppressed. SOLUTION: This circuit is provided with a phase comparison input selection circuit 2 for selecting the respective output signals of a delay cell for constituting a voltage controlled delay circuit 1 corresponding to multiplication ratio setting signals and input frequency range setting signals and outputting them to a phase comparator 3 and a selection waveform generation circuit 5 for generating multiplication clock signals CKOUT from the respective output signals of the delay cell corresponding to the multiplication ratio setting signals and the input frequency range setting signals.