摘要 |
A memory capacitor production process comprises applying a conductive side wall support structure (7) on a structure of an alternating first material and second material layer sequence (61, 62), an etch-stop layer (5) and a first material layer (4), forming an opening (8) through the layer sequence (61, 62) and removing the etch-stop layer (5) and the second material layers (62). A capacitor is produced in a memory IC by: (a) applying a first layer (4) of conductive first material and an auxiliary etch-stop layer (5) on a support (2); (b) applying a sequence of alternating first material layers (61) and second material layers (62); (c) structuring the layer sequence, the auxiliary layer (5) and the first layer (4) to form a layer structure; (d) covering the layer structure side walls with a conductive support structure (7); (e) forming a layer structure opening (8) which extends through the entire layer sequence (61, 62); (f) removing the auxiliary layer (5) and the second material layers (62) selectively with respect to the first material and the support structure; (g) producing a capacitor dielectric onto the exposed surfaces of the first material layers (61) and the support structure (7); and (h) forming a counter-electrode on the dielectric. Preferred Feature: The first material is doped silicon and the second material contains 10-100 mol% germanium and 0-90 mol% silicon. Alternatively, the first material is p<+>-doped polysilicon and the second material is p<->-doped or undoped polysilicon. The support structure consists of the first material.
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申请人 |
SIEMENS AG, 80333 MUENCHEN, DE |
发明人 |
REISINGER, HANS, DR., 82031 GRUENWALD, DE;SCHAEFER, HERBERT, DR., 85635 HOEHENKIRCHEN-SIEGERTSBRUNN, DE;STENGL, REINHARD, DR., 86391 STADTBERGEN, DE;WENDT, HERMANN, DR., 85630 GRASBRUNN, DE;LANGE, GERRIT, DIPL.-PHYS. DR., 81373 MUENCHEN, DE;FRANOSCH, MARTIN, DIPL.-PHYS., 81739 MUENCHEN, DE;HOENLEIN, WOLFGANG, DIPL.-PHYS. DR., 82008 UNTERHACHING, DE;LEHMANN, VOLKER, DR.RER.NAT., 80689 MUENCHEN, DE |