发明名称 Method and apparatus for distributing a clock tree within a hierarchical circuit design
摘要 A method and apparatus for distributing clock drivers within a hierarchical circuit design, wherein the clock drivers are concentrated in locations where they are actually needed rather than uniformly distributed throughout the circuit design. In an exemplary embodiment, the actual clock loads within a selected hierarchical region are determined, and a sufficient number of clock drivers are added as children objects to the selected hierarchical region. Since many placement tools may place the children objects within an outer boundary of the corresponding parent object, the clock drivers, as children objects of the selected hierarchical region, may be placed within the outer boundary of the selected hierarchical region. Accordingly, the clock drivers may be concentrated in the locations where actually needed.
申请公布号 US5912820(A) 申请公布日期 1999.06.15
申请号 US19970786851 申请日期 1997.01.22
申请人 UNISYS CORPORATION 发明人 KERZMAN, JOSEPH P.;REZEK, JAMES E.;RUSTERHOLZ, JOHN T.
分类号 G06F1/10;G06F17/50;(IPC1-7):G06F17/50 主分类号 G06F1/10
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