发明名称 Synchronous memory test method
摘要 An automated, portable, and time conservative memory test system for identifying test parameters including type, control line configuration, depth, width, access time, and burst features of any one of a wide variety of synchronous memories including SDRAMs and SGRAMs, and whether an IC chip, bank, board or module, without requiring hardware modifications or additions to the memory device being identified, and without requiring storage of test patterns or characterizing data in the memory device.
申请公布号 US5912852(A) 申请公布日期 1999.06.15
申请号 US19980115001 申请日期 1998.07.14
申请人 TANISYS TECHNOLOGY, INC. 发明人 LAWRENCE, ARCHER R.;LITTLE, JACK C.
分类号 G01R31/319;G11C29/02;G11C29/10;G11C29/44;G11C29/50;G11C29/56;(IPC1-7):G11C13/00 主分类号 G01R31/319
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