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发明名称
A CIRCUIT FOR GENERATING VC PAYLOAD CLOCK ACCORDING TO JUSTIFICATION IN A SYNCHRONOUS MULTIPLEXER
摘要
申请公布号
KR100201329(B1)
申请公布日期
1999.06.15
申请号
KR19960035243
申请日期
1996.08.23
申请人
DAEWOO TELECOM LTD.
发明人
KWAG, KYUNG-KAB
分类号
H04L7/00;(IPC1-7):H04L7/00
主分类号
H04L7/00
代理机构
代理人
主权项
地址
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