| 摘要 |
The invention relates to a bus system for serial transmission of digital data, comprising a plurality of individually addressable bus-transceivers (BT) connected through a two-wire-only general bus (4), over which synchronisation signals as well as digital data and energy are exchanged between the BTs. The result of an elementary logical combination (AND or OR) of the simultaneously transmitted values of all the BTs with an identical address is transmitted simultaneously, as a bit value, to all receiving BTs with also identical addresses. Every BT has its own time control- and synchronisation circuit (29) with a time base (18), a bit counter (22), a byte counter (23) and a comparator (24). When adequacy between the injected address and the address located in the bus (4), a digital data byte is serially transmitted through an I-O port (26). This bus-system can be set and operated without the use of software, whereby reverse polarity errors are eliminated during installation.
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