| 摘要 |
A high density, low capacitance, interconnect structure for microelectronic devices has unlanded vias formed with organic polymer intralayer dielectric material (212) using substantially vertical sidewalls. A method of producing unlanded vias includes forming a planarized organic polymer intra-layer dielectric between conductors, forming an inorganic dielectric over the conductor and organic polymer layer, patterning a photoresist layer such that openings in the photoresist layer overlap portions of both the conductor and the intra-layer dielectric, etching the inorganic dielectric, and then concurrently stripping the photoresist, and anisotropically etching the organic polymer intra-layer dielectric. A second conductor (218) is typically deposited into the via opening so as to form an electrical connection to the first conductor (206). A silicon based insulator containing an organic polymer can alternatively be used to form the intra-layer dielectric. |
