MANUFACTURE OF FUSE CAPABLE OF ELECTRICALLY OPERATING ON SEMICONDUCTOR SUBSTRATE

摘要

PROBLEM TO BE SOLVED: To eliminate need for using photolithographic steps for forming a hard mask for micro-cavity etching, by depositing a third layer of dielectrics material which is substantially conformal on a second layer, for closing an opening part of the second layer. SOLUTION: On a fuse part 102 and a substrate 104, a first dielectrics layer 302 is deposited, then a second dielectrics layer 304 is deposited over it. A rising part is formed directly above the fuse part 102. Using a chemical machinery polishing step, the rising part is polished to penetrate the second dielectrics layer 304, thus an opening part 408 is formed. Etching is performed, through the opening part 408, in the first dielectric 4 layer 302. A third dielectric layer 606 is deposited on the second dielectric layer 304. The third dielectric layer 606 is a plug dielectric layer, and the opening part 408 is closed without filling a micro-cavity 502 with a dielectrics material. Then, the micro cavity 502 is closed with a remaining part of an integrated circuit.