发明名称 SEMICONDUCTOR PROCESS SIMULATION METHOD
摘要 <p>PROBLEM TO BE SOLVED: To provide a semiconductor process simulation method which saves size of a memory region required for computation and shortens computation time, and also is fit for a multijog for performing the computation of plural process simulations at the same time. SOLUTION: First, at the time of declaration of a computation region, the thicknesses T1 and T2 (here, T1<T2) of two silicon substrates are declared (S801). Next, in the process of computation where there is no necessity to compute the state of the silicon substrate deeply to its inner part, mesh creation is performed (S802), with the thickness of the silicon substrate as T1, and the computation of each applicable process is performed (S803). Subsequently, in the process of computation where there is necessity to compute the state of the silicon substrate deeply to its inner part, mesh creation (remeshing) is performed (804), with the thickness of the silicon substrate as T2, and the computation of applicable process is performed (S805).</p>
申请公布号 JPH11150048(A) 申请公布日期 1999.06.02
申请号 JP19970330812 申请日期 1997.11.17
申请人 RICOH CO LTD 发明人 HINO TAKESHI
分类号 H01L21/265;G06F17/00;G06F17/50;G06F19/00;G06Q50/00;G06Q50/04;H01L21/00;H01L21/02;(IPC1-7):H01L21/02 主分类号 H01L21/265
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