Casing package for semiconductor power components

摘要

The top (8) and bottom metallising (10) of the ceramic layer are formed by metal foils secured to respective layer surfaces. At least one metallising (8) is structured and in form of an enclosed frame structure (8). A metal frame (4) forms the casing inner space (3) and is open at both sides and is soldered to the frame structure and hermetically closable by a lid (5). In the inner space are formed free-lying contact faces (8) and/or conductive tracks (10') and/or fastening surfaces (10') for semiconductor chips. All metal foils (8-10) and ceramic layers (7) of the multiple substrate (2) are interconnected by direct copper bond (DCB) technique, and all outer terminals (10) are exclusively formed on the multiple substrate.