| 摘要 |
The present invention includes an integrated resize engine and color compare logic for performing a resize bit block transfer (BitBLT) and a transparency BitBLT in a single operation. A source array of pixels is stretched and/or shrunk based upon control signals. The resized pixel values include red, green, and blue color values which are compared with predetermined color range values stored in register pairs. Preferably a register pair is provided for each color. A set of comparators is provided for each color to compare the register values with the color pixel values and to produce an output signal (IN RANGE) indicating if the color pixel value is within the range established by the register values. Each of the in range signals is provided to multiplex logic which generates a transparency enable (TE) output signal based upon the value of the IN RANGE signals and the value of a SELECT input signal. The transparency (TE) signal is written to a dedicated bit in a pixel value register to embed the transparency enable bit as part of the pixel value. Alternatively, or in addition to the multiplex logic, mask logic may be provided to mask the pixel based upon the IN RANGE output signals.
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