| 摘要 |
A voltage adder/subtractor circuit is provided, which has an improved frequency characteristic and which is operable at a low supply voltage such as approximately 1.1 V. This circuit includes a first differential pair of emitter/source-coupled first and second transistors driven by a first constant current, and a second differential pair of emitter/source-coupled third and fourth transistors driven by a second constant current having a same current value as that of the first constant current. A third constant current source/sink serving as a common load for the second and third transistors is connected to the collector/drain of the second transistor and the coupled collector/drain and base/gate of the third transistor. The third constant current source/sink supplies/sinks a third constant current having a same current value as that of the first constant current. A first input voltage is differentially applied across bases/gates of the first and second transistors. A second input voltage is applied to a base/gate of the fourth transistor. An output voltage is derived from the base/gate of the third transistor.
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